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Program

 

  Parellal Session Venue ─ Ballroom B 10/F
08:30 Registration
09:00 Opening & Welcoming Addresses    
09:15 Facing Red Supply Chain When Moore's Law Is Ending Chin-Yung Shu HMI
10:00 The Analytics of Things David Burgess SAS
10:35 Break
10:55 Cognitive Manufacturing in the Semiconductor Industry Dr. Rami Ahola IBM
11:30 Data Analytics in Semiconductor Industry Hohyun Sung MathWorks
12:05 Lunch
 
  Session — Technical Tutorial Venue ─ Ballroom B 10/F
13:30 Part I -- Case Studies of Machine Learning for Manufacturing Intelligence Roger Jang NTU
14:30 Part II -- Machine Learning Technologies for Semiconductor Industry Jeffrey Liu Terasoft
15:30 Break
 
  Session — Engineering Excellence
Venue ─ Ballroom C 10/F
13:30 Prioritization of Key In-Line Process Parameters for Electrical Characteristic Optimization of 16-nm High-k Metal Gate Bulk FinFET Devices Ping-Husn Su NCTU
13:45 Fundamentals of side isolation LDMOS device with 0.35um CMOS compatible process Deivasigamani Ravi Asia University
14:00 IPD Robustness Test Methodology for InFO Tang-Jung Chiu TSMC
14:15 Advance Technique for Automatic Optical Inspection Process Optimization Wiljelm Carl Olalia ON Semiconductor
14:30 Eliminating undercut profile of through silicon via by using nitrided fluorocarbon passivation in rapid alternating process Leonard Hsu Lam Research
14:45 Novel InFO Wafer-Level-Chip-Scale-Package N-Leak Test and Stress Hao Chen TSMC
15:00 Improvement of MIM Capacitor Early Breakdown by Metal Deposition Process Optimization and Ar Sputter Etch Implementation Chin-tsan Yeh Macronix
15:15 Wet Clean Study on Cobalt Silicide and Contact Processes Shih-Ping Lee Powerchip Technology
 
  Session — Manufacturing Excellence Venue ─ Ballroom B 10/F
16:00 The Role of Models in Semiconductor Smart Manufacturing Alan Weber Cimetrix
16:15 Opportunity for Improving Fab Effectiveness by Predictive Overall Equipment Effectiveness (POEE) in Industry 4.0 Yu-Ting Kao National Taiwan University
16:30 Heuristic Methods for Q-time Bottleneck Dispatching Ching-Lung Chang Winbond
16:45 Capacity Simulation by Cellular Automation in Endura Platform Tung-He Chou Macronix
17:00 Adjourn
 
  Session — Engineering Excellence Venue ─ Ballroom C 10/F
16:00 Virtual Metrology for 3D Vertical Stacking Processes in Semiconductor Manufacturing Chun-Fu Chen Macronix
16:15 New Process Variation Modeling Method of 3-D Capacitances for Advanced Nanometer CMOS Nodes Nodes Kuo-Fu Lee TSMC
16:30 Research on Ion Implanter Transferring from Spot Beam to Ribbon Beam Yu-An Chen Powerchip Technology
17:00 Adjourn

 

 

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